Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: anton@mips.complang.tuwien.ac.at (Anton Ertl) Newsgroups: comp.arch Subject: Re: is Vax addressing sane today Date: Mon, 09 Sep 2024 06:50:17 GMT Organization: Institut fuer Computersprachen, Technische Universitaet Wien Lines: 28 Message-ID: <2024Sep9.085017@mips.complang.tuwien.ac.at> References: <2024Sep6.080535@mips.complang.tuwien.ac.at> <2024Sep8.155511@mips.complang.tuwien.ac.at> Injection-Date: Mon, 09 Sep 2024 09:07:09 +0200 (CEST) Injection-Info: dont-email.me; posting-host="bff24d76364ca7ea0d223f91191d43fd"; logging-data="2433219"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/1jz+VCk+3RcJaihR6mIcL" Cancel-Lock: sha1:s5qtsHU6+mQ/vvHs7VWydn5jyQM= X-newsreader: xrn 10.11 Bytes: 2219 Lawrence D'Oliveiro writes: >On Mon, 9 Sep 2024 04:38:42 -0000 (UTC), Brett wrote: >> The next step up for a CPU has one ALU and one load/store unit, giving >> above one IPC. This is what one of the PlayStation CPU’s did. > >Those were the ones using PowerPC chips in the 1990s, I think it was. The first PlayStation used a 33MHz R3000 (single-issue). The PS2 released in 2000 used a 299MHz MIPS R5900-based core, two-way in-order superscalar. The PS3 released in 2006 used the PowerPC-based Cell broadband engine. >IBM’s POWER claimed superscalar performance right from its launch in, what >was it, 1989. 1990. It's interesting that it took so long to go to dual-issue with the same number of functional units. I guess that the early RISCs were bandwidth-limited, and only once the L1 cache(s) came on-chip, was there enough bandwidth to make superscalarity actually pay off. - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup,