Path: ...!weretis.net!feeder9.news.weretis.net!news.nk.ca!rocksolid2!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: Address bits again, Article on new mainframe use Date: Thu, 12 Sep 2024 20:48:41 +0000 Organization: Rocksolid Light Message-ID: <77d899f5feb9f06f611267885d157ad7@www.novabbs.org> References: <20240912141925.000039f3@yahoo.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="1826736"; mail-complaints-to="usenet@i2pn2.org"; posting-account="65wTazMNTleAJDh/pRqmKE7ADni/0wesT78+pyiDW8A"; User-Agent: Rocksolid Light X-Rslight-Posting-User: ac58ceb75ea22753186dae54d967fed894c3dce8 X-Spam-Checker-Version: SpamAssassin 4.0.0 X-Rslight-Site: $2y$10$Y6EZ5wynYVe2uX/YHEwPRuTVMLMtLdYFCFZKNEdYBWg2W..OeFMuK Bytes: 2250 Lines: 28 On Thu, 12 Sep 2024 20:15:01 +0000, John Levine wrote: > According to Michael S : >>x86 Real mode segmentation is a hack to the address space. 80286 >>protected mode segmentation is something else. The only similarity >>between the two is maximal size of segment is the same. > > The 386 had 32 bit segments which should have made segmented code > practical and efficient > and allowed giant programs with lots of gigabyte segments. But Intel > shot themselves in > the foot. One problem was that loading a segment register to switch > segments remained > extremely slow so you still needed to write your program to avoid doing > so. > > The other was that they mapped all the segments into a 32 bit linear > address space, and > paged the linear address space. That meant that the total size of all > active segments > had to fit into 4GB, at which point people said fine, whatever, set all > the segment > registers to map a single 4GB segment onto the linear address space and > used it as > a flat address machine. Intel's only other choice was to use more than 32-bits as the segment base address and they had run out of bits. >