Path: ...!weretis.net!feeder8.news.weretis.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Bill Sloman Newsgroups: sci.electronics.design Subject: Re: Anticipating processor architectural evolution Date: Sun, 28 Apr 2024 13:48:19 +1000 Organization: A noiseless patient Spider Lines: 52 Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Injection-Date: Sun, 28 Apr 2024 05:48:24 +0200 (CEST) Injection-Info: dont-email.me; posting-host="01858230f45e989aa1d995adc277cfad"; logging-data="905585"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18UUySH8qNCdZmcwHkAKRGQB0/CO6/GtSY=" User-Agent: Mozilla Thunderbird Cancel-Lock: sha1:3expn6Gv2sS+ibAhZLMxnvIKTps= Content-Language: en-US In-Reply-To: Bytes: 3275 On 28/04/2024 12:52 pm, John Larkin wrote: > On Sat, 27 Apr 2024 16:11:30 -0700, Don Y > wrote: > >> I've had to refactor my RTOS design to accommodate the likelihood of SMT >> in future architectures. >> >> Thinking (hoping?) these logical cores to be the "closest to the code", >> I call them "Processors" (hysterical raisins). Implicit in SMT is the >> notion that they are architecturally similar/identical. >> >> These are part of PHYSICAL cores -- that I appropriately call "Cores". >> >> These Cores are part of "Hosts" (ick; term begs for clarity!)... what >> one would casually call "chips"/CPUs. Note that a host can house dissimilar >> Cores (e.g., big.LITTLE). >> >> Two or more hosts can be present on a "Node" (the smallest unit intended to >> be added to or removed from a "System"). Again, they can be dissimilar >> (think CPU/GPU). >> >> I believe this covers the composition/hierarchy of any (near) future >> system architectures. And, places the minimum constraints on said. >> >> Are there any other significant developments in the pipeline that >> could alter my conception of future hardware designs? > > Why not hundreds of CPUs on a chip, each assigned to one function, > with absolute hardware protection? They need not be identical, because > many would be assigned to simple functions. > > The mess we have now is the legacy of thinking about a CPU as some > precious resource. The "mess" we have now reflects the fact that we are less constrained than we used to be. As soon as you could do multi-threaded processing life became more complicated, but you could do a great deal more. Anything complicated will look like a mess if you don't understand what's going on - and if you aren't directly involved why would you bother to do the work that would let you understand what was going on? If would be nice if we could find some philosophical high ground from which all the various forms of parallel processing could be sorted into a coherent taxonomy, but the filed doesn't seem to have found its Carl Linnaeus yet. -- Bill Sloman, Sydney