Path: ...!2.eu.feeder.erje.net!feeder.erje.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Stephen Fuld Newsgroups: comp.arch Subject: Re: "Mini" tags to reduce the number of op codes Date: Tue, 16 Apr 2024 15:08:58 -0700 Organization: A noiseless patient Spider Lines: 30 Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Injection-Date: Wed, 17 Apr 2024 00:08:59 +0200 (CEST) Injection-Info: dont-email.me; posting-host="e4560d6e9e80920818ac28626eb60e90"; logging-data="873549"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18u+DzCjjZshm89T3UmyH+3o93Vo1wZoho=" User-Agent: Mozilla Thunderbird Cancel-Lock: sha1:B71JxdOFKWNi44YJFFEaVbg0C8Y= In-Reply-To: Content-Language: en-US Bytes: 2131 On 4/3/2024 1:02 PM, Thomas Koenig wrote: > Stephen Fuld schrieb: > > [saving opcodes] > > >> The idea is to add 32 bits to the processor state, one per register >> (though probably not physically part of the register file) as a tag. If >> set, the bit indicates that the corresponding register contains a >> floating-point value. Clear indicates not floating point (integer, >> address, etc.). > > I don't think this would save a lot of opcode space, which > is the important thing. > > A typical RISC design has a six-bit major opcode. > Having three registers takes away fifteen bits, leaving > eleven, which is far more than anybody would ever want as > minor opdoce for arithmetic instructions. Compare with > https://en.wikipedia.org/wiki/DEC_Alpha#Instruction_formats > where DEC actually left out three bits because they did not > need them. I think that is probably true for 32 bit instructions, but what about 16 bit? -- - Stephen Fuld (e-mail address disguised to prevent spam)