Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: John Savard Newsgroups: comp.arch Subject: Re: Stealing a Great Idea from the 6600 Date: Sat, 20 Apr 2024 01:09:53 -0600 Organization: A noiseless patient Spider Lines: 23 Message-ID: References: <71acfecad198c4e9a9b14ffab7fc1cb5@www.novabbs.org> <1s042jdli35gdo092v6uaupmrcmvo0i5vp@4ax.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Injection-Date: Sat, 20 Apr 2024 09:09:53 +0200 (CEST) Injection-Info: dont-email.me; posting-host="0c3b57d7672b1fead873f2708a4e58d7"; logging-data="3722905"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18ZLJ68NeW8lb/VUh7yftVLVVnWssHf7tQ=" Cancel-Lock: sha1:CiMixs8NJrEC+jNg514lujHhtXM= X-Newsreader: Forte Free Agent 3.3/32.846 Bytes: 2070 On Fri, 19 Apr 2024 18:40:45 +0000, mitchalsup@aol.com (MitchAlsup1) wrote: >John Savard wrote: >> So presumably reduced ISA >> threads will need less agressive OoO, and 1/4 the rename registers >> might be adequate, but there's obviously no guarantee that this would >> indeed be an ideal fit. > >LoL. Well, yes. The fact that pretty much all serious high-performance designs these days _are_ OoO basically means that my brilliant idea is DoA. Of course, instead of replacing 1 full-ISA thread with 4 light-ISA threads, one could use a different number, based on what is optimum for a given implementation. But that ratio would now vary from one chip to another, being model-dependent. So it's not *totally* destroyed, but this is still a major blow. John Savard