Path: ...!weretis.net!feeder9.news.weretis.net!i2pn.org!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: address architecture, not interactive use, The Design of Design Date: Sat, 11 May 2024 17:21:32 +0000 Organization: Rocksolid Light Message-ID: <480891d5e2f66ad5c878a70817ad135f@www.novabbs.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="789286"; mail-complaints-to="usenet@i2pn2.org"; posting-account="65wTazMNTleAJDh/pRqmKE7ADni/0wesT78+pyiDW8A"; User-Agent: Rocksolid Light X-Rslight-Site: $2y$10$HADFIP8Kei6DLoVEFQL5ku4JPbD3XHBEMzhVzibEvfKTIqrR1/cim X-Spam-Checker-Version: SpamAssassin 4.0.0 X-Rslight-Posting-User: ac58ceb75ea22753186dae54d967fed894c3dce8 Bytes: 1816 Lines: 17 Thomas Koenig wrote: > John Levine schrieb: >> Brooks said it was ugly that some instructions (RX) had both base and >> index registers while others (SS) only had base registers, which I >> expect made it even harder to do what you suggested. > Depending on base registers for both data and branches was one > of the ideas that did not age well, I think. We have since > seen in the RISC machines that having a stack implemented via > a register, with possibly a frame pointer, a global offset and > larger offsets (16 bits) works well, and we know how to generate > position-independent code. Position independent data is still difficult, though. > This is, of course, with 20/20 hindsight.