Path: ...!news.mixmin.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Lawrence D'Oliveiro Newsgroups: comp.arch Subject: Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II Progress) Date: Tue, 16 Apr 2024 00:35:06 -0000 (UTC) Organization: A noiseless patient Spider Lines: 11 Message-ID: References: <868r55parv.fsf@linuxsc.com> <2024Jan11.080258@mips.complang.tuwien.ac.at> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Injection-Date: Tue, 16 Apr 2024 02:35:06 +0200 (CEST) Injection-Info: dont-email.me; posting-host="7122d47f46672ef7a70e2ca241d20ff2"; logging-data="607699"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+zGiEfd1RvucNlgL1eIXHR" User-Agent: Pan/0.155 (Kherson; fc5a80b8) Cancel-Lock: sha1:6LzdMokek0qA/Co1pvnMVcyDWqA= Bytes: 1792 On Sun, 14 Jan 2024 14:30:51 -0500, EricP wrote: > Furthermore, the address and data registers and buses are 16 bits and > the high 16-bits are shared ... No, in the 68000 family the A- and D- registers are 32 bits. If you compare the earlier members with the 68020 and later, it becomes clear that the architecture was designed as full 32-bit from the beginning, and then implemented in a cut-down form for the initial 16-bit products. Going full 32-bit was just a matter of filling in the gaps.