Path: ...!2.eu.feeder.erje.net!feeder.erje.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: anton@mips.complang.tuwien.ac.at (Anton Ertl) Newsgroups: comp.arch Subject: Re: a bit of history, Stealing a Great Idea from the 6600 Date: Fri, 03 May 2024 15:33:47 GMT Organization: Institut fuer Computersprachen, Technische Universitaet Wien Lines: 33 Message-ID: <2024May3.173347@mips.complang.tuwien.ac.at> References: <71acfecad198c4e9a9b14ffab7fc1cb5@www.novabbs.org> <80e0bf91545212a676011a9ccd0efa06@www.novabbs.org> Injection-Date: Fri, 03 May 2024 17:51:26 +0200 (CEST) Injection-Info: dont-email.me; posting-host="91e091e20b1a6fa18e9a38109ba9bc59"; logging-data="667316"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/swDuQomZUheuNorsniuPs" Cancel-Lock: sha1:wNHHWFXi37vRoNqDCTFjk3Kcq08= X-newsreader: xrn 10.11 Bytes: 2314 John Levine writes: [only 2 condition code bits] >In their archtecture book Brooks and Blaauw say it was a mistake, but >it also would have been a problem to fit conditional branches into the >instruction set if they needed more instruction bits to say which >codes to test. As it was, the branch instructions had 4 condition bits >which let them check for any combination of two-bit conditions along >with 1111 for unconditional branch and 0000 for no-op. The architecture paid for the reduction in branches with an increase in other instructions; S/360 needed signed and unsigned versions of a number of instructions, e.g., signed unsigned A AL AR ALR S SL SR SLR C CL CR CLR Other instruction sets with 16-bit instructions have no problem supporting the usual NCZV flags. IBM then continued in their tradition by having < = > and sticky overflow flags in Power (and a separate carry, sticky overflow and overflow flag); this also requires signed and unsigned compares (cmp and cmpl along with variants). - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup,