Path: ...!Xl.tags.giganews.com!local-1.nntp.ord.giganews.com!nntp.supernews.com!news.supernews.com.POSTED!not-for-mail NNTP-Posting-Date: Fri, 24 May 2024 18:46:05 +0000 From: john larkin Newsgroups: sci.electronics.design Subject: Re: An actual circuit Date: Fri, 24 May 2024 11:46:04 -0700 Message-ID: <2qn15jhk0gpck4ic68qhh2rmksa30sraa1@4ax.com> References: User-Agent: ForteAgent/8.00.32.1272 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 60 X-Trace: sv3-lV7TvcapsT/74B6VxxaFe2dhRY8sB/wRqssM06em9QTMuFSbCAr+cz1Fsvydoafj59m3CsmU+1U7kP+!qff5hZeXpzrBq5HC1+jlU8yBcPld0jDZEcylUqnZ7mxke68gl0LoTjh02fnf4yHMPZSJH7bokU0n!xCZhwg== X-Complaints-To: www.supernews.com/docs/abuse.html X-DMCA-Complaints-To: www.supernews.com/docs/dmca.html X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.40 Bytes: 3616 On Fri, 24 May 2024 20:33:55 +0200, Jeroen Belleman wrote: >On 5/24/24 17:59, Edward Rawde wrote: >> "john larkin" wrote in message >> news:bk815jh3skuecf1tap8o41rpgdh5kkq8o5@4ax.com... >>> On Thu, 23 May 2024 13:06:46 -0700, john larkin wrote: >>> >>>> On Thu, 23 May 2024 15:35:00 -0400, "Edward Rawde" >>>> wrote: >>>> >>>>> I was having a conversation with a younger person who seemed to be of the >>>>> view that to make an LED flash you would need something to decide when it >>>>> should be on or off. So that would be some kind of software or digital >>>>> system. >> ... >>>> >>> >>> The classic NPN astable circuit can hang up, with both transistors >>> saturated. I wonder if he jfet circuit can hang too, with Idss >>> grounding both drains and not enough gain to oscillate out of that >>> state. >>> >>> Even when they have a hang state, luck usually kicks them off into >>> oscillation. Your source resistors and asymmetric drain resistors >>> help it start up. Try making both drain resistors 3.3K. >>> >>> If you make the source resistors lower, it will hang up. >>> >> >> Yes I noticed both points when I was designing it. >> I wanted to have it start up by itself, preferably without a kickstart >> capacitor. >> So I had a complicated circuit with two more diodes and a transistor in the >> hope that I could detect the hang state and force it off balance. >> I couldn't get that to work >> Then I accidentally made R2 3,3k and R6 3.3k and I didn't see how it could >> start so quickly with no other help. >> Eventually I noticed 3,3k which maybe LTSpice takes as 3k. >> >> If R2 and R6 are both 3.3k then LTSpice says it slowly drifts into operation >> after 40 seconds. >> But why does it go one way and not the other? >> Is that an artefact of asymmetry in the simulation? >> Or is there some hidden asymmetry in the circuit I'm not seeing when R2 is >> 3.3k? > >Below are a pair of astable circuits. The left one is like yours, >with a hangup state. I start it by specifying an initial condition. >The right one will start all by itself. > >Jeroen Belleman Instead of nailing the top end of the gate resistors to V+, one can connect each to its own drain. That makes the fets go linear if they are not oscillating. Your right circuit sort of does that.