Path: ...!Xl.tags.giganews.com!local-1.nntp.ord.giganews.com!nntp.supernews.com!news.supernews.com.POSTED!not-for-mail NNTP-Posting-Date: Wed, 24 Apr 2024 20:48:40 +0000 From: boB Newsgroups: sci.electronics.design Subject: Re: Zilog stopping Z80 production Date: Wed, 24 Apr 2024 13:48:39 -0700 Message-ID: References: User-Agent: ForteAgent/8.00.32.1272 MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit Lines: 21 X-Trace: sv3-YcG5G3YqPF48rBL84L+3muD2gxIqipRGcQ7zmdZKDWwak7M8m54LkY9V+3FbtsN/NmbTulBTtb7KioJ!bRcCtbAp3NcsO3SzuwrswmmRLQVg69QjUdw0WsJsKtk5ukISZzIe8V4wekZcpydK271runuJLS1r!8aoBuAU= X-Complaints-To: www.supernews.com/docs/abuse.html X-DMCA-Complaints-To: www.supernews.com/docs/dmca.html X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.40 Bytes: 1731 On Wed, 24 Apr 2024 21:22:07 +0200, Lasse Langwadt wrote: >On 4/24/24 04:00, Don Y wrote: >> On 4/23/2024 5:08 PM, Edward Rawde wrote: >>> It must be trivial to get a VHDL/Verilog model and make your own by now. >> >> The problem with all the early/simple/trivial processors is getting >> the rest of the system to run as fast as the core can.  E.g., running >> a core at ~200MHz and expecting the same bus timing means < 5ns memory. >> >> (for a Z80, that would be ~10ns as the bus timing is inherently slower) >> > >how much memory can it address? > 64K 16 bits worth. boB