Path: ...!news.misty.com!weretis.net!feeder9.news.weretis.net!i2pn.org!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: why bits, Byte Addressability And Beyond Date: Mon, 6 May 2024 19:13:51 +0000 Organization: Rocksolid Light Message-ID: <6ab360e52ac30c68c93be51f879d6c78@www.novabbs.org> References: <2024May4.111127@mips.complang.tuwien.ac.at> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="289448"; mail-complaints-to="usenet@i2pn2.org"; posting-account="65wTazMNTleAJDh/pRqmKE7ADni/0wesT78+pyiDW8A"; User-Agent: Rocksolid Light X-Rslight-Posting-User: ac58ceb75ea22753186dae54d967fed894c3dce8 X-Rslight-Site: $2y$10$xmyyZdOlyeYIJIIA.ZDmnOFFihb.dEqzINARCnvL9MeXxeOSTD5WS X-Spam-Checker-Version: SpamAssassin 4.0.0 Bytes: 2826 Lines: 34 John Levine wrote: > According to Lawrence D'Oliveiro : >>On Sat, 04 May 2024 15:21:04 GMT, Scott Lurndal wrote: >> >>> d) all modern major architectures have instructions for bitfield >>> manipulation (insert, extract) obviating any need for general bit-level >>> addressing. >> >>Even if those bottom three bits of the address must be zero in every other >>instruction but these, I thought it would be convenient to have them, just >>for these bitfield instructions. It would save passing around a separate >>bit-offset field in arbitrary-bit-aligned pointers. > The only significant application for bit addressing that anyone has > mentioned is data compression. It's not something that computers spend > a great deal of time doing, and I see no reason to believe that bit > addressing would make it much faster than the way it's done now with > shifting and masking. > If you do want to make compression faster, it'd make more sense to add > instructions to do the compressing you compare about, like DFLTCC in > S/360 and zSeries that speed up gzip, rather than adding three bits to > the other 99% of instructions that don't use bit fields. > If you think otherwise, what are the applications that will make all > those address bits useful, and why do you think bit addressing will be > faster than shifting and masking? There's still going to be memory > underneath that's byte or word addressed so the shifting and masking > is going to happen anyway. Placing bit-field access INSIDE LDs and STs requires adding 2 stages of multiplexing in the LD/ST aligners (memory shifters). This has the potential to slow the overall pipeline frequency--at which point you have lost more than you can gain.