Path: ...!Xl.tags.giganews.com!local-1.nntp.ord.giganews.com!nntp.supernews.com!news.supernews.com.POSTED!not-for-mail NNTP-Posting-Date: Mon, 29 Apr 2024 19:19:40 +0000 From: boB Newsgroups: sci.electronics.design Subject: Re: Anticipating processor architectural evolution Date: Mon, 29 Apr 2024 12:19:40 -0700 Message-ID: References: User-Agent: ForteAgent/8.00.32.1272 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Lines: 44 X-Trace: sv3-zw0CaIwFGiMQtylA3IYGAtoSueXehMvLjepOGSZV9YVy8kyyn5chE2ooaFhz5a9F0HVpNbgAKyeqA8f!LHK/j/DNNMDaFLBnC8qyIqkllsPZEcj03vywKOCNlqdllXjH9GF3ds2epAim79EdsdlNTa/Faxqb!kApfLws= X-Complaints-To: www.supernews.com/docs/abuse.html X-DMCA-Complaints-To: www.supernews.com/docs/dmca.html X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.40 Bytes: 2635 On Sat, 27 Apr 2024 19:52:55 -0700, John Larkin wrote: >On Sat, 27 Apr 2024 16:11:30 -0700, Don Y > wrote: > >>I've had to refactor my RTOS design to accommodate the likelihood of SMT >>in future architectures. >> >>Thinking (hoping?) these logical cores to be the "closest to the code", >>I call them "Processors" (hysterical raisins). Implicit in SMT is the >>notion that they are architecturally similar/identical. >> >>These are part of PHYSICAL cores -- that I appropriately call "Cores". >> >>These Cores are part of "Hosts" (ick; term begs for clarity!)... what >>one would casually call "chips"/CPUs. Note that a host can house dissimilar >>Cores (e.g., big.LITTLE). >> >>Two or more hosts can be present on a "Node" (the smallest unit intended to >>be added to or removed from a "System"). Again, they can be dissimilar >>(think CPU/GPU). >> >>I believe this covers the composition/hierarchy of any (near) future >>system architectures. And, places the minimum constraints on said. >> >>Are there any other significant developments in the pipeline that >>could alter my conception of future hardware designs? > >Why not hundreds of CPUs on a chip, each assigned to one function, >with absolute hardware protection? They need not be identical, because >many would be assigned to simple functions. > Isn't this what Waferscale is, kinda ? boB >The mess we have now is the legacy of thinking about a CPU as some >precious resource. > >