Path: ...!weretis.net!feeder6.news.weretis.net!usenet.blueworldhosting.com!diablo1.usenet.blueworldhosting.com!nnrp.usenet.blueworldhosting.com!.POSTED!not-for-mail From: "Edward Rawde" Newsgroups: sci.electronics.design Subject: Re: Zilog stopping Z80 production Date: Wed, 24 Apr 2024 22:03:40 -0400 Organization: BWH Usenet Archive (https://usenet.blueworldhosting.com) Lines: 34 Message-ID: References: Injection-Date: Thu, 25 Apr 2024 02:03:42 -0000 (UTC) Injection-Info: nnrp.usenet.blueworldhosting.com; logging-data="48835"; mail-complaints-to="usenet@blueworldhosting.com" Cancel-Lock: sha1:ev5343UD8fT/tju3Fe3AZJB3SD0= sha256:goztnRNgQ+6ABfPGoWK/W+V4OkIyiRjNYMJjN2WfPXo= sha1:l1wCxETjP4EioxmMiDHCFpK5jMc= sha256:Ss+b0JrBs/Qso/G/6w1+N5UBTHzcTIiPHfEGm58CbXk= X-RFC2646: Format=Flowed; Response X-Priority: 3 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.6157 X-MSMail-Priority: Normal X-Newsreader: Microsoft Outlook Express 6.00.2900.5931 Bytes: 2354 "Lasse Langwadt" wrote in message news:v0c1mg$2is8l$1@dont-email.me... > On 4/24/24 22:48, boB wrote: >> On Wed, 24 Apr 2024 21:22:07 +0200, Lasse Langwadt >> wrote: >> >>> On 4/24/24 04:00, Don Y wrote: >>>> On 4/23/2024 5:08 PM, Edward Rawde wrote: >>>>> It must be trivial to get a VHDL/Verilog model and make your own by >>>>> now. >>>> >>>> The problem with all the early/simple/trivial processors is getting >>>> the rest of the system to run as fast as the core can. E.g., running >>>> a core at ~200MHz and expecting the same bus timing means < 5ns memory. >>>> >>>> (for a Z80, that would be ~10ns as the bus timing is inherently slower) >>>> >>> >>> how much memory can it address? >>> >> >> 64K >> 16 bits worth. > > so in something like and FPGA in is with range of internal ram and memory > speed is not really an issue Yes. That's where I'd put a Z80 in the unlikely event that I wanted to use one these days. Along with RAM, ROM, and anything else it needs. >