Path: ...!npeer.as286.net!npeer-ng0.as286.net!3.eu.feeder.erje.net!feeder.erje.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: John Savard Newsgroups: comp.arch Subject: Re: Privilege Levels Below User Date: Tue, 11 Jun 2024 13:07:56 -0600 Organization: A noiseless patient Spider Lines: 18 Message-ID: References: <2024Jun9.185245@mips.complang.tuwien.ac.at> <38ob6jl9sl3ceb0qugaf26cbv8lk7hmdil@4ax.com> <2024Jun10.091648@mips.complang.tuwien.ac.at> <3a691dbdc80ebcc98d69c3a234f4135b@www.novabbs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Injection-Date: Tue, 11 Jun 2024 21:07:57 +0200 (CEST) Injection-Info: dont-email.me; posting-host="f752231138247ec5b6f53ce61cda1d0c"; logging-data="1263028"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX18hBZRGAgeNk0HM/UJpNtPXTkbwY0nLAdo=" Cancel-Lock: sha1:W9/VGNOjCRqQy8l26VAE1l2LBWA= X-Newsreader: Forte Free Agent 3.3/32.846 Bytes: 2076 On Tue, 11 Jun 2024 00:45:28 +0000, mitchalsup@aol.com (MitchAlsup1) wrote: >I forgot to add that Mc 88120 had these features in 1992. >Stores waited for retirement. Given that in the case of external RAM, as opposed to registers inside the processor, there is only one possible value at any location... memory doesn't have a pile of rename locations to play with... I am so unimaginative that I don't think I could design a CPU in which stores to RAM didn't wait for the instruction that performed them to retire. That, though, wouldn't save me from Spectre, since Spectre leaks information by virtue of fetches of stuff _read_ in earlier speculated code that didn't really happen being in cache. John Savard