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From: Mikko <mikko.levanto@iki.fi>
Newsgroups: comp.theory
Subject: Re: Hypothetical possibilities
Date: Mon, 22 Jul 2024 14:05:10 +0300
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On 2024-07-20 15:28:31 +0000, olcott said:

> void DDD()
> {
>    HHH(DDD);
> }
> 
> int main()
> {
>    DDD();
> }
> 
> (a) Termination Analyzers / Partial Halt Deciders must halt
> this is a design requirement.

For a partial analyzer or deciders this is not always required.

> (b) Every simulating termination analyzer HHH either
> aborts the simulation of its input or not.

This must be interpreted to mean that a simulating termination analyzer
may abort its simulation for some simulated abort and simulate others
to the termination.

> (c) Within the hypothetical case where HHH does not abort
> the simulation of its input {HHH, emulated DDD and executed DDD}
> never stop running.

The case is not very hypothetical. Given the HHH you already have,
it is fairly easy to construct the "hypothetical" HHH and see what
it actually does.

> This violates the design requirement of (a) therefore HHH must
> abort the simulation of its input.

The violation simply means that the "hypothetical" HHH is not a
termination analyzer of partial halt decider in sense (a). What
it "must" be or do depends on the requirements.

-- 
Mikko