Path: ...!weretis.net!feeder8.news.weretis.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: anton@mips.complang.tuwien.ac.at (Anton Ertl) Newsgroups: comp.arch Subject: Re: Arguments for a sane ISA 6-years later Date: Tue, 30 Jul 2024 09:44:24 GMT Organization: Institut fuer Computersprachen, Technische Universitaet Wien Lines: 23 Message-ID: <2024Jul30.114424@mips.complang.tuwien.ac.at> References: <2024Jul26.190007@mips.complang.tuwien.ac.at> <2024Jul29.145933@mips.complang.tuwien.ac.at> Injection-Date: Tue, 30 Jul 2024 11:51:33 +0200 (CEST) Injection-Info: dont-email.me; posting-host="5b4b96dcde4d50485c7123a5b9fd795f"; logging-data="1038766"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+sTZNG3rCNLeFHLhGb73Ws" Cancel-Lock: sha1:IPmLcy3vJ5vSr62Y9HJ+ZcsncOM= X-newsreader: xrn 10.11 Bytes: 2000 BGB writes: >Otherwise, stuff isn't going to fit into the FPGAs. > >Something like TSO is a lot of complexity for not much gain. Given that you are so constrained, the easiest corner to cut is to have only one core. And then even seqyential consistency is trivial to implement. >Contrast, floating point and precise exceptions are a lot more relevant >to software. John von Neumann (IIRC) argued against floating point, with similar arguments that are now used to defend weak ordering. The other examples I gave are all examples where people have argued that simplifying hardware at the cost of more complex software was the way to go, and history proved them wrong. - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup,