Path: ...!news.nobody.at!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Lawrence D'Oliveiro Newsgroups: comp.arch Subject: Re: Instruction counts (was: Decrement And Branch) Date: Fri, 16 Aug 2024 07:06:11 -0000 (UTC) Organization: A noiseless patient Spider Lines: 10 Message-ID: References: <2024Aug14.111001@mips.complang.tuwien.ac.at> <2024Aug15.123928@mips.complang.tuwien.ac.at> <1f9360728a7b19bcbf3660565adfa2f5@www.novabbs.org> <2024Aug16.072330@mips.complang.tuwien.ac.at> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Injection-Date: Fri, 16 Aug 2024 09:06:11 +0200 (CEST) Injection-Info: dont-email.me; posting-host="fe72d36c65c5a55eac1ba2ec475c4532"; logging-data="1433933"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/z9Y+bEBC/QEvel4qjNrbk" User-Agent: Pan/0.159 (Vovchansk; ) Cancel-Lock: sha1:m0p9VXts3z7BENJNkKB8vCn0nik= Bytes: 1605 On Fri, 16 Aug 2024 05:23:30 GMT, Anton Ertl wrote: > ... instruction count was not > among the criteria that John Mashey identified as discerning between > RISC and non-RISC (not surprising given non-RISCs like PDP-11). Why is that particular criterion, of all of them, in the name, then? At one point I thought it should be “IRSC”, for “Increased Register Set Computer” ...