Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: jseigh Newsgroups: comp.arch Subject: Re: Computer architects leaving Intel... Date: Fri, 30 Aug 2024 12:04:22 -0400 Organization: A noiseless patient Spider Lines: 23 Message-ID: References: <2024Aug29.151755@mips.complang.tuwien.ac.at> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Injection-Date: Fri, 30 Aug 2024 18:04:23 +0200 (CEST) Injection-Info: dont-email.me; posting-host="35316df523afaaa9f2ce697a01f0eaa9"; logging-data="592965"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1//XozPDrnnOPfXLtWdyvqB" User-Agent: Mozilla Thunderbird Cancel-Lock: sha1:uidJEmAfCLbahLhdL1viU4NGbio= Content-Language: en-US In-Reply-To: Bytes: 1861 On 8/30/24 10:48, John Dallman wrote: > In article <2024Aug29.151755@mips.complang.tuwien.ac.at>, > anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote: >> jgd@cix.co.uk (John Dallman) writes: >>> Android is apparently waiting for a new RISC-V instruction set >>> extension; >> Which one? > > I don't know what its name is. It was proposed by Hans Boehm, and the > Android team pointed me to this discussion on a RISC-V mailing list: > > https://lists.riscv.org/g/tech-unprivileged/topic/92916241 > The RV64A stuff? I don't know about android but I would find it limiting. Kind of like having to work with C/C++17 concurrency support without having to resort to inline assembly on x64. I know risc-v thinks they solved the ABA problem with lr/sc but they haven't in all cases. Joe Seigh