Path: ...!news.mixmin.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Thomas Koenig Newsgroups: comp.arch Subject: Re: Computer architects leaving Intel... Date: Mon, 16 Sep 2024 20:15:59 -0000 (UTC) Organization: A noiseless patient Spider Lines: 37 Message-ID: References: <2024Aug30.161204@mips.complang.tuwien.ac.at> <2024Sep14.152652@mips.complang.tuwien.ac.at> Injection-Date: Mon, 16 Sep 2024 22:15:59 +0200 (CEST) Injection-Info: dont-email.me; posting-host="791bf6c76acc5f7d6a0b52e0480cb113"; logging-data="3195061"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+d1AeMlzD7cKs4WLC97grfgRqUi5M8G+4=" User-Agent: slrn/1.0.3 (Linux) Cancel-Lock: sha1:Mlmh9SVGEgc/PNT1i1DMbBB4N0w= Bytes: 2840 David Brown schrieb: > On 16/09/2024 09:17, Thomas Koenig wrote: >> David Brown schrieb: >>> On 14/09/2024 21:26, Thomas Koenig wrote: >>>> MitchAlsup1 schrieb: >>>> >>>>> In many cases int is slower now than long -- which violates the notion >>>>> of int from K&R days. >>>> >>>> That's a designers's choice, I think. It is possible to add 32-bit >>>> instructions which should be as fast (or possibly faster) than >>>> 64-bit instructions, as AMD64 and ARM have shown. >>>> >>> >>> For some kinds of instructions, that's true - for others, it's not so >>> easy without either making rather complicated instructions or having >>> assembly instructions with undefined behaviour (imagine the terror that >>> would bring to some people!). >> >> It has happened, see the illegal (but sometimes useful) >> 6502 instructions, or the recent RISC-V implementation snafu >> (GhostWrite). > > I have seen plenty of undefined behaviour in ISA's over the years. (A > very common case is that instruction encodings that are not specified > are left as UB so that later extensions to the ISA can use them.) A much better idea is to raise an exception, that way you can be sure that nobody uses it for nefarious purposes. > I was > just thinking of the reactions you'd get if you made an ISA where > attempting to overflow signed integer arithmetic was UB at the hardware > level, so that you could get faster and simpler instructions. Hard to see how this would be possible... but I realize this is a hypothetical example.