Path: ...!3.eu.feeder.erje.net!feeder.erje.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Brett Newsgroups: comp.arch Subject: Re: Is Intel exceptionally unsuccessful as an architecture designer? Date: Sat, 21 Sep 2024 16:23:38 -0000 (UTC) Organization: A noiseless patient Spider Lines: 67 Message-ID: References: <2935676af968e40e7cad204d40cafdcf@www.novabbs.org> <21028ed32d20f0eea9a754fafdb64e45@www.novabbs.org> <20240918190027.00003e4e@yahoo.com> <920c561c4e39e91d3730b6aab103459b@www.novabbs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Injection-Date: Sat, 21 Sep 2024 18:23:39 +0200 (CEST) Injection-Info: dont-email.me; posting-host="f0a27f4afb941726be0b084ce579f974"; logging-data="1757955"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/6nfWFrpHF8zQCBeTIPF+9" User-Agent: NewsTap/5.5 (iPad) Cancel-Lock: sha1:rKbh7eWv8ukdZY5MU00rmPjDBZk= sha1:/rbyUIOgiyrcM9AUTBufLa51wRg= Bytes: 4376 Chris M. Thomasson wrote: > On 9/20/2024 6:12 PM, Brett wrote: >> MitchAlsup1 wrote: >>> On Fri, 20 Sep 2024 21:54:36 +0000, Chris M. Thomasson wrote: >>> >>>> On 9/20/2024 2:32 PM, Lawrence D'Oliveiro wrote: >>>>> On Fri, 20 Sep 2024 11:21:52 -0400, Stefan Monnier wrote: >>>>> >>>>>>> The basic issue is: >>>>>>> * CPU+motherboard RAM -- usually upgradeable >>>>>>> * Addon coprocessor RAM -- usually not upgradeable >>>>>> >>>>>> Maybe the RAM of the "addon coprocessor" is not upgradeable, but the >>>>>> addon board itself can be replaced with another one (one with more RAM). >>>>> >>>>> Yes, but that’s a lot more expensive. >>>> >>>> I had this crazy idea of putting cpus right on the ram. So, if you add >>>> more memory to your system you automatically get more cpu's... Think >>>> NUMA for a moment... ;^) >>> >>> Can software use the extra CPUs ? >>> >>> Also note: DRAMs are made on P-Channel process (leakage) with only a few >>> layer of metal while CPUs are based on a N-Channel process (speed) with >>> many layers of metal. >> >> Didn’t you work on the MC68000 which had one layer of metal? >> >> This could be fine if you are going for the AI market of slow AI cpu with >> huge memory and bandwidth. >> >> The AI market is bigger than the general server market as seen in NVidea’s >> sales. >> >>> Bus interconnects are not setup to take a CPU cache miss from one >>> DRAM to a different DRAM on behalf of its contained CPU(s). >>> {Chicken and egg problem} >> >> Such a dram would be on the PCIE busses, and the main CPU’s would barely >> touch that ram, and the AI only searches locally. > > My crazy idea would be akin to a motherboard with a processor and a > bunch of slots. One would be filled with a special memory with cpu's on > it. If the user wants to add more memory they would gain extra cpu's. It > would be a NUMA like scheme. Programs running on cpus with _very_ local > ram would be happy. The main cpu's on the motherboard can be physically > close to the ram slots as well. Adding more memory means we have access > to more cpus that are very close to the memory. So, it might be > interesting out there in the middle of fantasy land for a moment... ;^o > Ouch! The newest Intel CPU’s have the dram on the socket, like the iPhone, you get four times the bandwidth. With no DIMM sockets instead of dual socket servers you get 4 and 8 socket servers. What you are asking for is coming today. ;) I have a bunch of dual socket servers that only have one socket populated, bottom price tier. > The manual says if you don't need to share data, don't do it... Right on > the cover! lol. ;^D >