Path: ...!weretis.net!feeder9.news.weretis.net!i2pn.org!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: Tonights Tradeoff - Background Execution Buffers Date: Tue, 24 Sep 2024 20:38:52 +0000 Organization: Rocksolid Light Message-ID: <37067f65c5982e4d03825b997b23c128@www.novabbs.org> References: <17537125c53e616e22f772e5bcd61943@www.novabbs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="3339057"; mail-complaints-to="usenet@i2pn2.org"; posting-account="65wTazMNTleAJDh/pRqmKE7ADni/0wesT78+pyiDW8A"; User-Agent: Rocksolid Light X-Spam-Checker-Version: SpamAssassin 4.0.0 X-Rslight-Site: $2y$10$fFbu0seH6tycny8ut.nDc.ljH9Mi7pHOhGWB/pgoyy1ikhE7mWMam X-Rslight-Posting-User: ac58ceb75ea22753186dae54d967fed894c3dce8 Bytes: 2344 Lines: 19 On Tue, 24 Sep 2024 20:03:29 +0000, Robert Finch wrote: > Under construction: Q+ background execution buffers for the block memory > operations. For instance, a block store operation can be executed in the > background while other instructions are executing. Store operations are > issued when the MEM unit is not busy. Background instructions continue > to execute even when interrupts occur. The background operations may be > useful for initializing blocks of memory that are not needed right-away. > When the operation is issued a handle for the buffer is returned in the > destination register so that the status of the operation may be queried, > or the operation cancelled. This is how My 66000 performs:: LDM, STM, ENTER, EXIT, MM, and MS. Addresses are AGENED and then a state machine over in the memory unit performs the required steps. {{Not usefully different than the divider performing the individual steps of division.}} While the unit performs its duties, other units can be fed and complete other instructions. You just have to mark the affected registers to prevent hazards.