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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Oops (Concertina II Going Around in Circles)
Date: Mon, 6 May 2024 19:45:09 +0000
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John Savard wrote:

> On Sun, 05 May 2024 00:57:44 -0600, John Savard
> <quadibloc@servername.invalid> wrote:

>>The main opcode space for 32-bit instructions is now divided as
>>follows:
>>
>>3/4 for uncompromised memory-reference instructions.
>>
>>3/16 for uncompromised register-to-register operate instructions.
>>
>>1/16 for the header required for variable-length instructions.

> This is not quite right.

> 3/4 for uncompromised basic memory-reference instructions.

> 1/8 for other memory-reference instructions.

> 1/16 for uncompromised register-to-register operate instructions.

> 1/16 for the header required for variable-length instructions.

In comparison::

  1/8   for [Rbase+@disp16]
  1/8   for Rd = Rs1 OP imm16
  1/64  for [Rbase,Ri<<scale,#disp]
  1/64  for Rd = Rs1 OP Rs2
  1/64  for Rd = 3OP( Rs1,Rs2,Rs3)
  1/64  for Rd = 1OP( Rs1 )
  1/64  for PRED
  1/64  for <w:o>
  1/8   for branching

> John Savard