Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Lasse Langwadt Newsgroups: sci.electronics.design Subject: Re: DDS, again Date: Thu, 12 Dec 2024 01:05:50 +0100 Organization: A noiseless patient Spider Lines: 33 Message-ID: References: <36gjljpv1p6l0es2klp4as4e1oblolhh71@4ax.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Injection-Date: Thu, 12 Dec 2024 01:05:51 +0100 (CET) Injection-Info: dont-email.me; posting-host="fc34fe6059a1898f0f115bdbccbead91"; logging-data="1888564"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/16UxoJABIiPMYuq+R3bMzmp+jvNH3JIE=" User-Agent: Mozilla Thunderbird Cancel-Lock: sha1:en9gLtxxO01yemNr5Vlssrof8mk= In-Reply-To: Content-Language: en-US Bytes: 2471 On 12/11/24 21:47, Klaus Vestergaard Kragelund wrote: > On 11-12-2024 17:49, john larkin wrote: >> On Wed, 11 Dec 2024 14:07:45 +0100, Klaus Vestergaard Kragelund >> wrote: >> >>> On 11-12-2024 03:38, john larkin wrote: >>>> I have been unsuccessful in getting LT Spice to simulate a DDS >>>> frequency generator. It's bad enough trying to make the NCO part, but >>>> whenever I get close it stalls or throws convergence errors. >>>> >>> >>> I think you have the funds to buy Cadence Pspice. It has auto >>> convergence build in. It's seldom I see problems with convergence after >>> they added that feature. >> >> LT Spice is usually pretty good. It just didn't like my trying to make >> a 32-bit phase accumulator with an analog circuit. >> >> I once fixed a convergence problem by adding one resistor to the >> circuit. 1K, one ended grounded, the other end open. >> >> LT is horrible with digital stuff. Imagine making a 32-bit phase >> accumulator with its parts. There isn't a screen big enough. >> >> Qspice is I hear better at mixed-signal sims. >> >> I can always have one of my kids Matlab the hard stuff. >> > If you buy Pspice Advanced, you can run c++ code in each time step, or > whatever timestep you like. I am doing that to simulate a digital SMPS > in spice qspice and also run c++ or verilog modules