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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Whether something is RISC or not (Re: PDP-8 theology, not Concertina II
 Progress)
Date: Wed, 2 Oct 2024 21:34:33 +0000
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On Wed, 2 Oct 2024 16:08:43 +0000, Brett wrote:

> David Schultz <david.schultz@earthlink.net> wrote:
>> On 10/1/24 3:00 PM, Thomas Koenig wrote:
>>> MitchAlsup1 <mitchalsup@aol.com> schrieb:
>>>
>>>> A 32-bit bus would have priced the 68K at 30%-50% higher simply
>>>> due to the number of pins on available packages. This would have
>>>> eliminated any chance at competing for the broad markets at that
>>>> time.
>>>
>>> Would have an external 16-bit bus and an internal 32-bit bus have
>>> been advantageous, or would this have blown a likely transistor
>>> budget for little gain?
>>
>> Saving an extra pass through the 16 bit ALU for a 32 bit operation would
>> be faster. Assuming that you didn't have to wait for another bus cycle
>> to get the other half of an operand.
>>
>> Making it faster for register to register operations and not much else.
>
> A 16 bit barrel roller does not make sense, and Motorola had no idea
> that shifts would be so important.

In the original 68000, a barrel shifter would have blown the area
budget--it would have been about equal to the d-section; even in
16-bit form. Remember this was a 1 layer metal design before poly
silicon was in the process.