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From: "Fred. Zwarts" <F.Zwarts@HetNet.nl>
Newsgroups: comp.theory
Subject: Re: How the requirements that Professor Sipser agreed to are exactly
 met --- WDH
Date: Thu, 15 May 2025 13:10:44 +0200
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Op 14.mei.2025 om 17:04 schreef olcott:
> On 5/14/2025 9:26 AM, joes wrote:
>> Am Tue, 13 May 2025 16:52:14 -0500 schrieb olcott:
>>> On 5/13/2025 4:39 PM, joes wrote:
>>>> Am Tue, 13 May 2025 16:30:20 -0500 schrieb olcott:
>>>>> On 5/13/2025 6:43 AM, Richard Damon wrote:
>>>>>> On 5/13/25 12:52 AM, olcott wrote:
>>>>
>>>>>>> It is truism that simulating termination analyzers must report on
>>>>>>> the behavior of their input as if they themselves never aborted this
>>>>>>> simulation:
>>>>>>
>>>>>> Right, of the input actually given to them, which must include all
>>>>>> their code, and that code is what is actually there, not created by
>>>>>> this imaginary operation.
>>>>>>
>>>>> In other words every single byte of HHH and DD are 100% totally
>>>>> identical except the hypothetical HHH has its abort code commented
>>>>> out.
>>>> ...the simulating HHH, but not the simulatED one.
>>>>
>>>>>> But you aren't simulating the same PROGRAM D that the original was
>>>>>> given.
>>>>>>
>>>>> It is not supposed to be the same program. *simulated D would never
>>>>> stop running* refers to a different HHH/DD pair
>>>> Uh yes it is supposed to be the same actual input. The *simulator* is
>>>> hypothetical.
>>>>
>>> HHH is supposed to report on the behavior that *would* happen if this
>>> HHH never aborted its input.
>> Right, if *this* simulator never aborted simulating *that* HHH that DDD
>> calls, which does abort. They are 100% completely different, except for
>> everything apart from the abort. HHH should report on what an UTM would
>> do with DDD calling the aborting HHH, namely halt.
>>
> 
> <MIT Professor Sipser agreed to ONLY these verbatim words 10/13/2022>
>      If simulating halt decider H correctly simulates its
>      input D until H correctly determines that its simulated D
>      would never stop running unless aborted then
> 
> *H correctly simulates its input D*
> HHH simulates its input DDD according to the rules
> of the x86 language

HHH makes only a start with a simulation of its input but violates the 
rules of the x86 language by halting when there is not a HLT instruction.

> 
> *until H correctly determines*
> This requires a partial simulation of non-terminating inputs.

No it incorrectly misses a part of te input that specifies an abort. 
That part of the input specifies that there is a halting program.
That the programmer made HHH blind for the specification does not mean 
that the specification is not there.
> 
> *its simulated D would never stop running unless aborted*
> DDD simulated by a hypothetical HHH that never aborts
> *would never stop running*
> 

And because it is aborted, this is a vacuous statement.
HHH should use its actual input, not a arbitrary hypothetical one.
sum(3,2) must use its actual input, not te hypothetical 4 and 5.
Face the facts, not your dreams. Come out of rebuttal mode. Try to think!