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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Why I've Dropped In
Date: Sat, 21 Jun 2025 02:51:25 +0000
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On Sat, 21 Jun 2025 1:48:51 +0000, Waldek Hebisch wrote:

> MitchAlsup1 <mitchalsup@aol.com> wrote:
>> On Fri, 20 Jun 2025 17:48:20 +0000, Stefan Monnier wrote:
>>
>>>> Creating the hidden bit is 2-gates of delay (H,F,D,Q).
>>>
>>> How come it's not free in hardware?
>>> Is it only because of denormalized?
>>
>>     hidden = operand.exponent != 0
>>
>> Which is an 11-input NAND gate. I suspect you could assume it is 1
>> and special case the result, but even special casing the result
>> cannot be less than 1-gate (a multiplexer).
>>
>> You DO end up special casing Infinities and NaNs; anyway.
>>
>>    Special = operand.exponent == 0b11111111111
>>
>> Which is an 11-input AND gate.
>
> But do explicit bit lead to a difference?  IIUC FPU need to
> special cases anyway.  I would guess that a flag normal/special
> could save some time, but once FPU knows that it deals with
> normal numbers hidden bit should be effectively free.

FADD/SUB starts out with an exponent subtract, so you have time to
"invent" the hidden bit at almost zero cost.

FMUL/MAC/DIV/SQRT starts out with a big multiplexer (float,double)
that allows one to invent the hidden bit at near zero cost.

FCMP does not need to "invent" the hidden bit because it is a sign-
magnitude integer compare (with special cases).

So, the cost is between actual zero, and nearly zero if your
circuit designer is worth being on the payroll.