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Path: ...!weretis.net!feeder8.news.weretis.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: John Savard <quadibloc@servername.invalid> Newsgroups: comp.arch Subject: Re: Stealing a Great Idea from the 6600 Date: Sat, 20 Apr 2024 18:01:49 -0600 Organization: A noiseless patient Spider Lines: 29 Message-ID: <onl82j9k5llpmtn8fdn6qkdbkp258d3r6b@4ax.com> References: <lge02j554ucc6h81n5q2ej0ue2icnnp7i5@4ax.com> <e2097beb24bf27eed0a92f14596bd59e@www.novabbs.org> <in312jlca131khq3vj0i24n6pb0hah2ur5@4ax.com> <71acfecad198c4e9a9b14ffab7fc1cb5@www.novabbs.org> <1s042jdli35gdo092v6uaupmrcmvo0i5vp@4ax.com> <oj742jdvpl21il2s5a1ndsp3oidsnfjmr6@4ax.com> <dd1866c4efb369b7b6cc499d718dc938@www.novabbs.org> <b1q62jhfp2qi2gjbnqd4kk14boderokara@4ax.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Injection-Date: Sun, 21 Apr 2024 02:01:50 +0200 (CEST) Injection-Info: dont-email.me; posting-host="927163daac3c1197b41694d2d6822608"; logging-data="4134060"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX19DD/fE+hRHsQFluC7FGwLJ7VJKopC2Cp8=" Cancel-Lock: sha1:Qy8ZlPdhtDM8tK7Ci2OC3ys23xA= X-Newsreader: Forte Free Agent 3.3/32.846 Bytes: 2550 On Sat, 20 Apr 2024 01:06:33 -0600, John Savard <quadibloc@servername.invalid> wrote: >On Fri, 19 Apr 2024 18:40:45 +0000, mitchalsup@aol.com (MitchAlsup1) >wrote: > >>So how does a 32-register thread "call" an 8 register thread ?? or vice >>versa ?? > >That sort of thing would be done by supervisor mode instructions, >similar to the ones used to start additional threads on a given core, >or start threads on a new core. > >Since the lightweight ISA has the benefit of having fewer registers >allocated, it's not the same as, slay, a "thumb mode" which offers >more compact code as its benefit. Instead, this is for use in classes >of threads that are separate from ordinary code. > >I/O processing threads being one example of this. Of course, though, there's nothing preventing using the lightweight ISA as the basic for something that _could_ interoperate with the full ISA. Keep all 32 registers in each bank, and have a sliding 8-register window, or use bundles of instructions, say up to seven instructions, using one of three groups of eight integer registers and one of four groups of floating-point registers. (The fourth group of integer registers is the base registers.) John Savard