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From: Michael S <already5chosen@yahoo.com>
Newsgroups: comp.arch
Subject: Re: Non-pipelined FDIV/SQRT
Date: Sun, 28 Jul 2024 13:08:19 +0300
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On Thu, 18 Jul 2024 12:56:46 -0400
EricP <ThatWouldBeTelling@thevillage.com> wrote:

> Stefan Monnier wrote:
> >> If the FP multiplier is a 4-stage pipeline, and FDIV is iterating
> >> using the multiplier, can the pipeline get a mix of multiple
> >> operations going at once?  FDIV for both Newton=E2=80=93Raphson and
> >> Goldschmidt iterates serially so each can only use one of the 4
> >> pipeline slots. =20
> >=20
> > Something I've been wondering for a while, indeed.
> > IOW, is there enough parallelism inside the FDIV/SQRT "microcode"
> > to keep the FMAC fully busy (my naive understanding is that there
> > isn't)? If not, do current CPU make the FMAC available for other
> > operations while an FDIV/SQRT is in progress?  If not, how hard
> > would it be?
> >=20
> >=20
> >         Stefan =20
>=20
> And if they can't mix then to what extent can the end of one op,
> as it drains from the pipeline, overlap with the start of the next?
> Obviously FMUL can pipeline with FMUL but can the next FMUL overlap
> with the end of a prior FDIV? An EXP?
>=20
> I was thinking about reservation station schedulers and wondering
> what they might have to optimize.
>=20
>=20

On most (all ?) modern GBOoO cores FDIV can overlap with the next
independent FDIV and sometimes with more than one. In that light
it would be hard to believe that FDIV can not overlap with FMUL or FMAC.