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Path: ...!news.mixmin.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: Michael S <already5chosen@yahoo.com>
Newsgroups: comp.arch
Subject: Re: Stealing a Great Idea from the 6600
Date: Wed, 31 Jul 2024 10:40:55 +0300
Organization: A noiseless patient Spider
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On Tue, 30 Jul 2024 23:51:39 -0000 (UTC)
Lawrence D'Oliveiro <ldo@nz.invalid> wrote:

> On Tue, 30 Jul 2024 12:04:59 +0300, Michael S wrote:
> 
> > On Tue, 30 Jul 2024 02:10:05 -0000 (UTC) Lawrence D'Oliveiro
> > <ldo@nz.invalid> wrote:
> >   
> >> That would be equivalent to a 100-wide in-order processor, would it
> >> not?  
> > 
> > It would not.  
> 
> Why not?

How many instructions in flight are there on 1-wide in-order MIPS
R3000? How many on 1-wide in-order MIPS R4000?