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From: Michael S <already5chosen@yahoo.com>
Newsgroups: comp.arch
Subject: Re: Is Intel exceptionally unsuccessful as an architecture
 designer?
Date: Mon, 23 Sep 2024 10:53:36 +0300
Organization: A noiseless patient Spider
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Message-ID: <20240923105336.0000119b@yahoo.com>
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On Mon, 23 Sep 2024 01:34:55 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:

> On Mon, 23 Sep 2024 0:53:35 +0000, jseigh wrote:
> 
> > On 9/22/2024 5:39 PM, MitchAlsup1 wrote:  
> 
> > Speaking of memory models, remember when x86 didn't have
> > a formal memory model.  They didn't put one in until
> > after itanium.  Before that it was a sort of processor
> > consistency type 2 which was a real impedance mismatch
> > with what most concurrent software used a a memory model.  
> 
> When only 1 x86 would fit on a die, it really did not mater
> much. I was at AMD when they were designing their memory
> model.
> 
> > Joe Seigh  


Why # of CPU cores on die is of particular importance?
According to my understanding, what matters is # of CPU cores with
coherent access to the same memory+IO.
For x86, 4 cores (CPUs) were relatively common since 1996. There
existed few odd 8-core systems too, still back in the last century.