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From: Michael S <already5chosen@yahoo.com>
Newsgroups: comp.arch
Subject: Re: Is Intel exceptionally unsuccessful as an architecture
 designer?
Date: Tue, 24 Sep 2024 00:34:03 +0300
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On Mon, 23 Sep 2024 21:10:00 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:

> On Mon, 23 Sep 2024 15:06:50 +0000, Scott Lurndal wrote:
>=20
> > "Paul A. Clayton" <paaronclayton@gmail.com> writes: =20
> >>On 9/17/24 8:44=E2=80=AFPM, Lawrence D'Oliveiro wrote: =20
> >>> On Tue, 17 Sep 2024 23:45:50 +0000, MitchAlsup1 wrote:
> >>> =20
> >>>> "the CPUs are simply I/O managers to the Inference Engines and
> >>>> GPUs." =20
> >>>
> >>> That particular Wheel of Reincarnation will never turn that way.
> >>>
> >>> Why? It comes down to RAM. Those addon processors will never have
> >>> access to the sheer quantity of RAM that is available to the CPU.
> >>> And motherboard-based CPU RAM is upgradeable, as well, whereas
> >>> addon cards tend not to offer this option. =20
> >>
> >>My guess would be that CPU RAM will decrease in upgradability. =20
> >
> > LDO's statement "will never have access to the sheer quantity of
> > RAM that is available to the CPU" is flat out wrong.
> >
> > Marvell already offers a CXL add-on processor card that supports
> > up to 4TB of DRAM with 16 high-end ARM64 V series cores. =20
>=20
> At somewhere near 3=C3=97 the latency to DRAM.
>=20

Where did you find this figure?
I have read both product brief and press release and didn't see any
latency numbers mentioned, not even an order of magnitude.

I suppose, in order to get real datasheet one would have to sign NDA.

Somehow I don't see how anything running over PCIe-like link can be
as fast as you suggest.

> If the size works for your application--great !
> If the latency does not work for you--less great.