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From: Michael S <already5chosen@yahoo.com>
Newsgroups: comp.arch
Subject: Re: Is Intel exceptionally unsuccessful as an architecture
 designer?
Date: Tue, 24 Sep 2024 12:37:58 +0300
Organization: A noiseless patient Spider
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On Tue, 24 Sep 2024 00:45:22 -0000 (UTC)
Lawrence D'Oliveiro <ldo@nz.invalid> wrote:

> On Sun, 22 Sep 2024 10:34:16 +0300, Michael S wrote:
> 
> > The difference between MPP and cluster is not well-defined.
> > The difference between ccNUMA and MPP-or-cluster is crystal clear.  
> 
> If memory on other nodes were made directly addressable via hardware
> that implemented something like a message-passing bus, suddenly the
> difference is not so clear.

For as long as communication is not cache-coherent the difference vs
ccNUMA is still crystal clear.

I vaguely remember that in late 1990s Cray made computer of this sort,
a predecessor of later far more successful CRAY-XT3/4. The later had to
give up on direct addressability in order to scale for vastly higher
number of nodes and of total memory.
May be, Cray T3E ?