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Path: ...!news.mixmin.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: Michael S <already5chosen@yahoo.com> Newsgroups: comp.arch Subject: Re: is Vax addressing sane today Date: Mon, 7 Oct 2024 22:26:58 +0300 Organization: A noiseless patient Spider Lines: 38 Message-ID: <20241007222658.00005841@yahoo.com> References: <vdg3d1$2kdqr$1@dont-email.me> <20241001123426.000066c1@yahoo.com> <2024Oct1.182625@mips.complang.tuwien.ac.at> <vdknel$3e4pf$9@dont-email.me> <2024Oct3.085754@mips.complang.tuwien.ac.at> <vdne1a$3uaeh$4@dont-email.me> <m1rufjhpi09m9adedt87nrcdfmij1i8pvb@4ax.com> <2024Oct4.090534@mips.complang.tuwien.ac.at> <vdsnk4$ukl1$6@dont-email.me> <2024Oct6.104055@mips.complang.tuwien.ac.at> <vdv6ta$1dc01$8@dont-email.me> <2024Oct7.091702@mips.complang.tuwien.ac.at> <20241007122709.000072c0@yahoo.com> <2024Oct7.190910@mips.complang.tuwien.ac.at> <ve16be$1q31n$1@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Injection-Date: Mon, 07 Oct 2024 21:27:00 +0200 (CEST) Injection-Info: dont-email.me; posting-host="933e57c526e05c8f3df819cd66cd6f2d"; logging-data="1924647"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+XI0j6YxOazSE9b9GoZzey1hH+HJMFfoc=" Cancel-Lock: sha1:E2FOnqcGI8DcrWbRZTD2bI6g1Qg= X-Newsreader: Claws Mail 4.1.1 (GTK 3.24.34; x86_64-w64-mingw32) Bytes: 2785 On Mon, 7 Oct 2024 17:38:54 -0000 (UTC) Thomas Koenig <tkoenig@netcologne.de> wrote: > Anton Ertl <anton@mips.complang.tuwien.ac.at> schrieb: > > Michael S <already5chosen@yahoo.com> writes: > >>On Mon, 07 Oct 2024 07:17:02 GMT > >>anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote: > >> > >>> > >>> However, in John Mashey's criteria the number of registers plays a > >>> role; he requires >4 bits for the GPR specifier, and >3 bits for > >>> the FPR specifier. > >>> > >>> - anton > >> > >>Which sounds rather arbitrary. > > > > In a way it is, but see below. > > > >>Or even worse, like if he wanted for > >>SPARC to be called 'typical RISC' and for ARM to be called atypical > >>and had chosen the numbers to match the agenda. > > > > I think that ARM did not exist for John Mashey. > > When was his definition made? > > ARM was rather late to the RISC game, this might have been literally > true. ARM was rather early to the RISC game. Shipped for profit since late 1986. Less than a year after MIPS and ROMP. Several months after SPARC. PA-RISC first shipped in the 1986H1, but volume production started later than ARM. Appolo PRISM, Motorola 88K, Intel i960 and AMD 29K all came later than ARM.