Deutsch   English   Français   Italiano  
<2024Aug30.140704@mips.complang.tuwien.ac.at>

View for Bookmarking (what is this?)
Look up another Usenet article

Path: ...!feeds.phibee-telecom.net!3.eu.feeder.erje.net!feeder.erje.net!news.in-chemnitz.de!news.swapon.de!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail
From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: Computer architects leaving Intel...
Date: Fri, 30 Aug 2024 12:07:04 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
Lines: 48
Message-ID: <2024Aug30.140704@mips.complang.tuwien.ac.at>
References: <vaqgtl$3526$1@dont-email.me> <memo.20240830090549.19028u@jgd.cix.co.uk> <vas3tq$eev5$1@dont-email.me> <2024Aug30.122638@mips.complang.tuwien.ac.at> <20240830145246.00003587@yahoo.com>
Injection-Date: Fri, 30 Aug 2024 15:04:27 +0200 (CEST)
Injection-Info: dont-email.me; posting-host="0f802512a75abac598a61593e1338edd";
	logging-data="544825"; mail-complaints-to="abuse@eternal-september.org";	posting-account="U2FsdGVkX18C6o3695Mxxs99Et5HrXYC"
Cancel-Lock: sha1:k5/UG9s+MIROOdTVw9skDOyGcL0=
X-newsreader: xrn 10.11
Bytes: 3431

Michael S <already5chosen@yahoo.com> writes:
>On Fri, 30 Aug 2024 10:26:38 GMT
>anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
>> Intel could have increased this kind of
>> obsolescence (and the resulting new sales) through instruction set
>> extensions by supporting AVX across the board early on (as AMD did),
>> and later by supporting AVX512 across the board, but Intel marketing
>> apparently thinks it's better to get people to buy Core-branded rather
>> than Pentium-branded CPUs by disabling AVX for a long time on the
>> latter.
>> 
>
>I wish if it was only marketing, i.e. if it were only fuses in big-core
>derived Pentiums and Celerons.
>Unfortunately, the bigger problem was poor work (laziness) of Intel's
>engineering that didn't have AVX, or any for VEX decoding, in their
>Atom line until Gracemont.

Intel has certainly disabled AVX in Pentiums and Celerons that used
the P-cores (e.g., Skylake-based Pentiums).  That's purely marketing.

Concerning the "Atom"-based processors, it seems to me that they were
not lazy, they did what they were told, and they were told not to
implement AVX.  Admittedly, this saves a little area and maybe a
little power, but the AMD Jaguar (2013) included AVX and went for the
same market segment as the Intel Silvermont (2013).  And not just
Silvermont excluded AVX, so did Goldmont (2016), Goldmont+ (2017), and
Tremont (2020), and also the contemporaneous P-core-based Pentiums and
Celerons.  Apparently the idea was that AVX/AVX2 and AVX-512 are
premium features.

One interesting case is the Xeon E-2400 line.  On these CPUs only the
P-Cores are enabled, they are server processors, and yet Intel
disabled AVX-512 (which the Xeon E-2300 line has).  I wonder what the
reasoning behind that decision was.

>It's not marketing, it's engineers, who produced quite capable core
>like Tremont with thhe level of ISA support 10 years behind its time.

If their bosses tell them to create a core without AVX, what should
they do? (Answer: Found Ahead! :-) If their bosses had asked them to
create a core with AVX, would they have rebelled out of lazyness?  I
doubt it.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>