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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: Computer architects leaving Intel...
Date: Fri, 30 Aug 2024 15:10:02 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
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Message-ID: <2024Aug30.171002@mips.complang.tuwien.ac.at>
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jgd@cix.co.uk (John Dallman) writes:
>In article <2024Aug29.151755@mips.complang.tuwien.ac.at>,
>anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
>> jgd@cix.co.uk (John Dallman) writes:
>> > Android is apparently waiting for a new RISC-V instruction set 
>> > extension;
>> Which one?
>
>I don't know what its name is. It was proposed by Hans Boehm, and the
>Android team pointed me to this discussion on a RISC-V mailing list:
>
>https://lists.riscv.org/g/tech-unprivileged/topic/92916241

Thanks.

>Searching with various terms suggests it might well be the Zabha
>extension, ratified in April this year, but that is deduction.

Yes.

>> Now it's two years later, and the RISC-V servers are still not 
>> showing up. 
>
>Yup. RISC-V established a lot of awareness, and some expectations, but
>there hasn't been the equipment to let people start using it. 

There is equipment, but only at the small-system end for now, with
Raspi-like SBCs being the top of the line for now.

The Visionfive V2 is one of them, and is roughly comparable to a Raspi
3 (1.5GHz in-order core).  We have the V1, and it runs Fedora just
fine, albeit slowly.

The BeagleV-Ahead has 4 Xuantie C910 cores (2GHz out-of-order multiple
issue), but only 4GB RAM.  It's harder to find, but there seems to be
an Ubuntu image for it:
<https://community.element14.com/products/devtools/single-board-computers/next-genbeaglebone/b/blog/posts/beaglev-ahead-getting-started-1>

I find it funny to find this on an Element14 page (the company
formerly known as Acorn, the original A in ARM); Element14 has long
since been bought by Broadcom, but apparently some web presence still
exists.

But making the jump from embedded systems and SBCs to servers has not
happened for RISC-V yet, and looking how long it took to establish ARM
in servers, I expect that RISC-V will take quite a while.  I guess
that high-performance cores like those that Ahead is probably working
on are one component along the way.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>