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Path: ...!weretis.net!feeder6.news.weretis.net!feeder8.news.weretis.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: anton@mips.complang.tuwien.ac.at (Anton Ertl) Newsgroups: comp.arch Subject: Re: Efficiency of in-order vs. OoO Date: Mon, 25 Mar 2024 08:41:06 GMT Organization: Institut fuer Computersprachen, Technische Universitaet Wien Lines: 43 Message-ID: <2024Mar25.094106@mips.complang.tuwien.ac.at> References: <uigus7$1pteb$1@dont-email.me> <unbumf$lot2$1@dont-email.me> <uncbrq$o1ml$1@dont-email.me> <06c802c7848a4a522bc022bbd2fdce68@news.novabbs.com> <2024Jan7.091347@mips.complang.tuwien.ac.at> <uoovaf$1crob$1@dont-email.me> <2024Jan24.084731@mips.complang.tuwien.ac.at> <urg471$215g3$7@dont-email.me> <87e39cb1345cb3575c49196f3ee56cee@www.novabbs.org> <utpkun$fdrm$1@dont-email.me> <d28278800443aa5f710d20d03a54ff78@www.novabbs.org> <Wb0MN.450377$yEgf.117969@fx09.iad> <utql1c$mvg6$1@dont-email.me> Injection-Date: Mon, 25 Mar 2024 09:57:08 +0100 Injection-Info: dont-email.me; posting-host="dcb0fb0dc265e73eaebdbb7e1ee3f5fd"; logging-data="1052182"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/vmjYycz0M0LioXfIDAu5L" Cancel-Lock: sha1:bRBkQDCdLUhByYsHnDDEU1KftJM= X-newsreader: xrn 10.11 Bytes: 3336 "Paul A. Clayton" <paaronclayton@gmail.com> writes: >On 3/24/24 4:39 PM, Scott Lurndal wrote: >> mitchalsup@aol.com (MitchAlsup1) writes: >>> Paul A. Clayton wrote: >> >>>> (I was also very surprised by how much extra state the A55 has: >>>> over 100 extra "registers". Even though these are not all 64-bit >>>> data storage units, this was still a surprising amount of extra >>>> state for a core targeting area efficiency. The storage itself may >>>> not be particularly expensive, but it gives some insight into how >>>> complex even a "simple" implementation can be.) .... >However, having over 100 seems like a lot. Supporting performance >counters and tracing is also something that would have been nearly >inconceivable for something like the MIPS R2000. Certainly. The A55 is similar to the 21164 (1994), which is much bigger than the R2000. For competition to the R2000, better look at the ARM1/ARM2, or, for something more contemporary, maybe the Cortex-M1. >An argument might be made that some designs would have no use for >most of such extra state. Performance monitoring is useful for >software development (and theoretically for OS decisions for >scheduling, core migration, and other functions), but seems likely >to be highly underutilized for typical use. A55 is presumably >large enough that a synthesis-time remove of much of this >functionality would have a tiny effect on total area. ARM also has the Cortex-A35 (with a 25% smaller core than the A53 and 80-100% of its performance according to ARM). I am unaware of it being used in smartphones, though. >Even for a >microcontroller the area cost might not be problematic. ARM-A is not for microcontrollers. ARM has ARM-M for that, e.g., the Cortex-M0 if you want it to be really small. - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>