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Path: ...!feeds.phibee-telecom.net!3.eu.feeder.erje.net!feeder.erje.net!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!.POSTED!not-for-mail From: anton@mips.complang.tuwien.ac.at (Anton Ertl) Newsgroups: comp.arch Subject: Re: Efficiency of in-order vs. OoO Date: Mon, 25 Mar 2024 18:35:35 GMT Organization: Institut fuer Computersprachen, Technische Universitaet Wien Lines: 19 Message-ID: <2024Mar25.193535@mips.complang.tuwien.ac.at> References: <uigus7$1pteb$1@dont-email.me> <06c802c7848a4a522bc022bbd2fdce68@news.novabbs.com> <2024Jan7.091347@mips.complang.tuwien.ac.at> <uoovaf$1crob$1@dont-email.me> <2024Jan24.084731@mips.complang.tuwien.ac.at> <urg471$215g3$7@dont-email.me> <87e39cb1345cb3575c49196f3ee56cee@www.novabbs.org> <utpkun$fdrm$1@dont-email.me> <d28278800443aa5f710d20d03a54ff78@www.novabbs.org> <Wb0MN.450377$yEgf.117969@fx09.iad> <utql1c$mvg6$1@dont-email.me> <M8iMN.162473$46Te.13669@fx38.iad> Injection-Date: Mon, 25 Mar 2024 19:39:52 +0100 (CET) Injection-Info: dont-email.me; posting-host="dcb0fb0dc265e73eaebdbb7e1ee3f5fd"; logging-data="1319703"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1/+c0hW17tJKsnro/IXg1Yb" Cancel-Lock: sha1:kPF5Q2cD2Qa3IZCW3Z1Yj4HmTG8= X-newsreader: xrn 10.11 Bytes: 2266 scott@slp53.sl.home (Scott Lurndal) writes: >There is a significant demand for performance monitoring. Note >that in addition to to standard performance monitoring registers, >AArch64 also (optionally) supports statistical profiling and >out-of-band instruction tracing (ETF). The demand from users >is such that all those features are present in most designs. Interesting. I would have expected that the likes of me are few and far between, and easy to ignore for a big company like ARM, Intel or AMD. My theory was that the CPU manufacturers put performance monitoring counters in CPUs in order to understand the performance of real-world programs themselves, and how they should tweak the successor core to relieve it of bottlenecks. - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>