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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: Byte Addressability And Beyond
Date: Sat, 04 May 2024 09:11:27 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
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Lawrence D'Oliveiro <ldo@nz.invalid> writes:
>On Fri, 03 May 2024 15:13:30 GMT, Anton Ertl wrote:
>
>> Lawrence D'Oliveiro <ldo@nz.invalid> writes:
>>
>>>But why stop there?
>> 
>> Others have provided good answers for that.  Here's another one: Given
>> the requirements (based on the predecessors), there was not reason to go
>> beyond byte addressing.  And looking at history, this seems to have been
>> the right choice.
>
>That applied back in history, when we had fewer addressing bits to play 
>with, what about now?

Byte addressing still seems to be the right choice, for the same
reasons: We have lots of string data, and data that needs larger
units, but for data that fits in smaller units

a) either there is so little that spending a full byte on it is good
enough, or

b) the data is handled by so little code that the burden from the lack
of bit addressing is relatively low in the overall scheme of things, or

c) programs deal with arrays of these things in a SIMD way, and bit
addressing provides little to no benefit.

For case b), we deal with bits or bit fields in a similar way that the
word-addressed machines of the old days dealt with characters.  I
guess that there were people that considered byte addressing similarly
unnecessary that most of us consider bit addressing, so what is the
difference?

Apparently in the number of use cases: Byte addressing eventually won:
IBM switched to it with the S/360, DEC with the PDP-11, the successful
16-bit (and later 32-bit) microprocessors supported it, while the
word-addressed machines were less successful and eventually vanished
in niches.

David Ungar's PhD thesis was on SOAR (aka RISC-IV), which was either
word-addressed or (like Alpha) word-accessed; in one of the last
chapters of his thesis he wrote that the most beneficial feature for
performance that SOAR did not have was byte accesses, which would have
reduced the number of cycles by IIRC 10% (to be balanced against
potential negative effects on the cycle-time); I found that quite
surprising for a thesis that mainly focussed on architectural features
for Smalltalk execution.

By contrast, there were two well-known cases of bit-addressed
machines: The IBM Stretch and the Intel iAPX 432, both of which failed
to achieve their performance goals and which did not succeed in the
market.  I guess that this is not due to bit-addressing only, but that
bit-addressing is a symptom of the feature creep that doomed these
projects.  More focussed projects usually did not add bit addressing.

I expect that various architects of from-scratch projects have looked
at the question, and most concluded that bit-addressing provided not
enough benefits to justify the cost.  And those bit-addressed
architectures that were introduced did not become great hits, unlike
the S/360 and the PDP-11.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>