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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: Memory ordering (was: Arm ldaxr / stxr loop question)
Date: Fri, 15 Nov 2024 17:19:34 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
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Message-ID: <2024Nov15.181934@mips.complang.tuwien.ac.at>
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Michael S <already5chosen@yahoo.com> writes:
>On Fri, 15 Nov 2024 07:25:12 GMT
>anton@mips.complang.tuwien.ac.at (Anton Ertl) wrote:
>
>> aph@littlepinkcloud.invalid writes:
>> >Yes. That Alpha behaviour was a historic error. No one wants to do
>> >that again.  
>> 
>> Was it an actual behaviour of any Alpha for public sale, or was it
>> just the Alpha specification?  I certainly think that Alpha's lack of
>> guarantees in memory ordering is a bad idea, and so is ARM's: "It's
>> only 32 pages" <YfxXO.384093$EEm7.56154@fx16.iad>.  Seriously?
>> Sequential consistency can be specified in one sentence: "The result
>> of any execution is the same as if the operations of all the
>> processors were executed in some sequential order, and the operations
>> of each individual processor appear in this sequence in the order
>> specified by its program."
>> 
>
>Of course, it's not enough for SC.
>What you said holds, for example, for TSO and even by some memory
>ordering models that a weaker than TSO.
>The points of SC is that in addition to that it requires for any two
>stores by different agents to be observed in the same order by all
>agents in the system, including those two.

That's included in the statement I cited: stores are operations, and
the behaviour is the same as executing all thoperations in some
sequential order.  I.e., all processors observe everything they
observe with the same results.  I have this definition from
<https://en.wikipedia.org/wiki/Sequential_consistency>, which cites
the following source for it: Leslie Lamport, "How to Make a
Multiprocessor Computer That Correctly Executes Multiprocess
Programs", IEEE Trans. Comput. C-28,9 (Sept. 1979), 690-691.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>