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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: Keeping other stuff with addresses (was: What is an N-bit machine?)
Date: Sat, 30 Nov 2024 16:57:56 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
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Thomas Koenig <tkoenig@netcologne.de> writes:
>Anton Ertl <anton@mips.complang.tuwien.ac.at> schrieb:
>> anton@mips.complang.tuwien.ac.at (Anton Ertl) writes:
>>>John Levine <johnl@taugh.com> writes:
>>>>These days I'd say the relevant N is the size of arithmetic registers but a
>>>>lot of marketers appear to disagree with me.
>>>
>>>Which arithmetic registers on an Intel processor?  The 64 bits of a
>>>GPR?  The 128 bits of an XMM register?  The 256 bits of a YMM
>>>register?  The 512 bits of a ZMM register?
>>
>> The Cray-1 is even more interesting in that respect.  Is it a 4096-bit
>> machine?
>
>If you consider the widest arithmetic it is capable of in one piece,
>it is a 64-bit machine.

That's not John Levine's criterion.

BTW, with your criterion, the Zen5 in the Ryzen AI 370HX is a 256-bit
machine, while the Zen5 in the Ryzen 9600X is a 512-bit machine.
According to John Levine's criterion they are both 512-bit machines.
According to me they are both 64-bit machines.  John Levine's and my
criteria are architectural, yours is implementation-oriented.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>