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From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Newsgroups: comp.arch
Subject: Re: is Vax addressing sane today
Date: Sat, 12 Oct 2024 09:18:23 GMT
Organization: Institut fuer Computersprachen, Technische Universitaet Wien
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EricP <ThatWouldBeTelling@thevillage.com> writes:
>Kent Dickey wrote:
[...]
>GCC's -trapv option is not useful for a variety of reasons.
>1) its slow, about 50% performance hit
>2) its always on for a compilation unit which is not what programmers need
>    as it triggers for many false positives so people turn it off.
....
>> So why should any hardware include an instruction to trap-on-overflow?
>
>Because ALL the negative speed and code size consequences do not occur.

Looking at <https://godbolt.org/z/oMhW55YsK> and selecting MIPS clang
18.1.0, I get a 15-instruction sequence which does not include add
(the trap-on-overflow version).

MIPS gcc 14.2.0 generates a sequence that includes

jal __addvsi3

i.e., just as for x86-64.  Similar for MIPS64 with these compilers.

Interestingly, with RISC-V rv64gc clang 18.1.0, the sequence is much
shorter than for MIPS clang 18.1.0, even though RV64GC has no specific
way of checking overflow at all.

- anton
-- 
'Anyone trying for "industrial quality" ISA should avoid undefined behavior.'
  Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>