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Path: ...!eternal-september.org!feeder3.eternal-september.org!news.eternal-september.org!eternal-september.org!.POSTED!not-for-mail From: anton@mips.complang.tuwien.ac.at (Anton Ertl) Newsgroups: comp.arch Subject: Re: auto predicating branches Date: Mon, 21 Apr 2025 06:05:32 GMT Organization: Institut fuer Computersprachen, Technische Universitaet Wien Lines: 49 Message-ID: <2025Apr21.080532@mips.complang.tuwien.ac.at> References: <vbgdms$152jq$1@dont-email.me> <ebe5b174d1e95801af623a450c464504@www.novabbs.org> <veelbd$9gnd$2@dont-email.me> <veeso3$aq72$1@dont-email.me> <vfvi1f$2kp4s$1@dont-email.me> <vgerdr$1v4nd$1@dont-email.me> <vtptau$3p73s$1@dont-email.me> <vtq6vh$39sli$1@dont-email.me> <Is7MP.2098019$OrR5.521315@fx18.iad> <4f65d9544ad95edc8b07c869f9921a35@www.novabbs.org> <vtsbga$1tu26$1@dont-email.me> <b8859e8d6b909a4505c0f487a6a0fe35@www.novabbs.org> <vu2542$38qev$1@dont-email.me> <vu46su$1170i$1@dont-email.me> Injection-Date: Mon, 21 Apr 2025 08:37:27 +0200 (CEST) Injection-Info: dont-email.me; posting-host="ceeff083949eaa7af3a3bdab18efb848"; logging-data="1734853"; mail-complaints-to="abuse@eternal-september.org"; posting-account="U2FsdGVkX1+o/NlC1WbU62vJvXVUpGzh" Cancel-Lock: sha1:gNZu12nZImxgWpUpwsTmS0alh9g= X-newsreader: xrn 10.11 Bytes: 3920 Robert Finch <robfi680@gmail.com> writes: >Having branches automatically convert into >predicates when they branch forward a short distance <7 instructions. If-conversion in hardware is a good idea, if done well, because it involves issues that tend to be unknown to compilers: * How predictable is the condition? If the condition is very well predictable, if-conversion is not a good idea, because it turns the control dependency (which does not cost latency when the prediction is correct) into a data dependency. Moreover, in this case the if-conversion increases the resource consumption. Compilers are not good at predicting the predictability AFAIK. * Is the condition available before or after the original data dependencies? And if afterwards, by how many cycles? If it is afterwards and the branch prediction would be correct, the if-conversion means that the result of the instruction is available later, which may reduce IPC. OTOH, if the branch prediction would be incorrect, the recovery also depends on when the condition becomes available, and the total latency is higher in the case of no if-conversion. The compiler may do an ok job at predicting whether a condition is available before or after the original data dependencies (I don't know a paper that evaluates that), but without knowing about the prediction accuracy of a specific condition that does not help much. So the hardware should take predictability of a condition and the availability of the condition into consideration for if-conversion. What about reverse if-conversion in hardware, i.e., converting predicated instructions and the like (conditional moves, if-then-else instructions and the instructions they control) into branch-predicted phantom branches and eliminating the data dependency on the condition from the instruction. For performance, one might consider reverse if-conversion, because the same considerations apply; however, there is also a security aspect: programmers have used these instructions instead of branches to produce constant-time code to avoid timing side channels of code that deals with secrets; and the discovery of Spectre has shown additional timing side channels of branches. Because you cannot be sure that the predicated instruction is there for security reasons, you must not use reverse if-conversion in hardware. - anton -- 'Anyone trying for "industrial quality" ISA should avoid undefined behavior.' Mitch Alsup, <c17fcd89-f024-40e7-a594-88a85ac10d20o@googlegroups.com>