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From: joes <noreply@example.org>
Newsgroups: comp.theory
Subject: Re: Liar detector: Fred, Richard, Joes and Alan --- Ben's agreement
Date: Sat, 6 Jul 2024 15:26:57 -0000 (UTC)
Organization: i2pn2 (i2pn.org)
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Am Sat, 06 Jul 2024 10:10:06 -0500 schrieb olcott:
> On 7/6/2024 10:00 AM, Fred. Zwarts wrote:
>> Op 06.jul.2024 om 15:01 schreef olcott:
>>> On 7/6/2024 4:09 AM, Fred. Zwarts wrote:
>>>> Op 05.jul.2024 om 17:54 schreef olcott:
>>>>> On 7/5/2024 10:48 AM, Fred. Zwarts wrote:
>>>>>> Op 05.jul.2024 om 16:05 schreef olcott:
>>>>>>> On 7/5/2024 8:54 AM, Fred. Zwarts wrote:
>>>>>>>>
>>>>>>>> HHH cannot possibly correctly simulate itself.

>>>>>> Your replies are only irrelevant, or supporting my reasoning. I
>>>>>> showed that HHH cannot possibly simulate itself correctly and your
>>>>>> full trace supports this, as it shows that the simulating HHH is
>>>>>> unable to reach the 'ret' of the simulated HHH.
>>>>>>
>>>> Unable to reach ret *is a freaking demonstration* of an incorrect
>>>> simulation.
>>>>
>>> If it was incorrect you would have to show which x86 instruction was
>>> simulated incorrectly. You can't do that because it is a matter of
>>> verified fact that none of them were simulated incorrectly.
You have previously agreed that the direct execution halts. How can
a simulation deviate and be correct?

> The semantics of the x86 language are the only criterion measure of
> correct emulation. Only stupid liars would disagree.
Which semantics say that you are allowed to abort a simulation that
halts anyway and return that it doesn’t?

> Smart liars would not disagree because they would know how stupid this
> makes them look. Smart liars would disagree on much more subtle things.
People that know their way around notice obvious mistakes.

>> Is it really over your head? The simulated instructions are correct,
>> but the instructions that are not simulated make the simulation
>> incorrect. The simulation is aborted too soon. One cycle later the
>> simulated HHH would abort and halt. That part of the input is neglected
>> by your simulation, which makes it incorrect, because it should process
>> the whole input, not only the first part.
This is the right place to respond.

>>>> Your traces shows that HHH aborts the simulation at a point there the
>>>> simulated HHH has only one cycle to go before it would abort and
>>>> halt.
>>>
>>> All of the HHH have the same code. The outer HHH meets its abort
>>> criteria first. It is a verified fact that unless the outer HHH aborts
>>> then none of them do. This violates this correct criteria
>> 
>> Incorrect reasoning.
>> Dreaming of an HHH that does not abort is irrelevant. This HHH *does*
>> abort. The outer one does, so all of them do. Therefore, the HHH
>> simulated by the outer one is aborted one cycle before it would abort
>> and halt, as well. That makes the abort premature.
>> HHH cannot possibly simulate itself correctly.

>>>> So, the only reason why this simulation does not reach the 'ret' of
>>>> the simulated HHH, is that it is aborted prematurely.
>>>> A correct simulation by another simulator shows that this is indeed
>>>> the case.
>>>
>>> HHH1 can wait for HHH to abort because DDD does not call HHH1.
>>> HHH cannot wait because DDD calls HHH.
And HHH halts, by definition.

-- 
Am Fri, 28 Jun 2024 16:52:17 -0500 schrieb olcott:
Objectively I am a genius.