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From: Richard Damon <richard@damon-family.org>
Newsgroups: comp.theory
Subject: Re: key error in all the proofs --- fakers or liars?
Date: Mon, 12 Aug 2024 19:43:57 -0400
Organization: i2pn2 (i2pn.org)
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On 8/12/24 7:11 PM, olcott wrote:
> On 8/12/2024 6:08 PM, joes wrote:
>> Am Mon, 12 Aug 2024 17:46:20 -0500 schrieb olcott:
>>> On 8/12/2024 5:31 PM, joes wrote:
>>>> Am Mon, 12 Aug 2024 16:23:30 -0500 schrieb olcott:
>>>>> On 8/12/2024 4:13 PM, Richard Damon wrote:
>>>>>> On 8/12/24 2:25 PM, olcott wrote:
>>>>>>> On 8/12/2024 1:16 PM, Richard Damon wrote:
>>>>>>>> On 8/12/24 1:32 PM, olcott wrote:
>>>>>>>>> On 8/12/2024 12:12 PM, Richard Damon wrote:
>>
>>>>>> One thing I do note is that the trace sees conditional jump
>>>>>> instructions in the trace, but your "rule" is that there can be no
>>>>>> conditional instructions see in the full loop, so something is wrong.
>>>>>> Page 79, simulated the JNZ 00001335 at address 000012f8 Why wasn't
>>>>>> this counted as a conditional instruction in the trace? (That means
>>>>>> the recursion isn't unconditional)
>>>>>> So, mybe it is a correct partial emulation, but just ignores some of
>>>>>> the meaning, so that conditional recursion is incorrectly considered
>>>>>> to be infinite recursion. Perhaps you just failed to test you code to
>>>>>> see that it correctly detects conditional jump instructions.
>> How is that branch simulated?
>>
> 
> Go look and see for yourself.
> https://github.com/plolcott/x86utm/blob/master/Halt7.c

And why when it scan the trace for conditional branches, does it not see 
the instruction as a conditional branch?

Something seems very off in the code that does the "DebugStep", as the 
structure (Decoded_Line_Of_Code) that it returns that results in is 
defined in Halt7.c (and not a header), but the funcition "DebugStep" is 
defined as just a stub, but its signature doesn't match the DebugStep 
function in x86utm.cpp

I suspect this is something you added (as why would the debug step 
operation need two sets of registers?) Why is there a "Master" and a 
"Slave" set of registers, since it should be just stepping the 
instruction in the context that it is running in.


> 
>>>>>> Note, examining your code, your code also VIOLATES your requirement
>>>>>> to be a pure functikon.
>>>>>> First, in Init_Halts_HH you detect if you are the "root" decider by
>>>>>> look to see it the stack is at the initial prefilled value, and if so
>>>>>> make yourself the "root" and setup a trace buffer, and record that we
>>>>>> are the "Root"
>>>>>> Then in Decides_Halting_HH you test that Root flag, and only the
>>>>>> "Root"
>>>>>> decider actually does halt deciding, thus the copy of HHH that DDD
>>>>>> calls performs a DIFFERENT set of actions to the ones that the one
>>>>>> called by main does.
>>>>>> Thus, You are proven to be a liar that you code ACTUALLY acts as a
>>>>>> pure function. The static memory isn't just a way for the lower
>>>>>> emulator to have its results seen by the higher emulator, but the
>>>>>> emulators actually change from Halt Deciders to pure emulators when
>>>>>> they are nes
>>>> This is where I lose track. HHH is not simulating itself.
>> It changes behaviour based on a global variable.
>>
>>>>>>>> that it doesn't simulate what happens in HHH after the jmp 000015e7
>>>>>>>> instruction, and thus you claim is still a LIE.
>>>>>>> That is counter factual.
>>>>>> Maybe it is recording but not looking at those instructions. Why else
>>>>>> is it ignoring the conditional instructions?
>>>>> I proved that your statements were counter-factual.
>>>> Above I see only your claim. What is simulated after that jump?
>> Still open.
>>
>>>>> I finally found a group of tens of thousands of people that totally
>>>>> understand what I am saying.
>>
> 
>