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Path: ...!weretis.net!feeder9.news.weretis.net!i2pn.org!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: x86S Specification Date: Tue, 22 Oct 2024 00:03:43 +0000 Organization: Rocksolid Light Message-ID: <3c6510cc947a1b59b62753de4cf98293@www.novabbs.org> References: <dqfQO.411015$WOde.295848@fx09.iad> <vf6j1l$144cr$1@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="3102047"; mail-complaints-to="usenet@i2pn2.org"; posting-account="o5SwNDfMfYu6Mv4wwLiW6e/jbA93UAdzFodw5PEa6eU"; User-Agent: Rocksolid Light X-Rslight-Site: $2y$10$MUDIFSBtgvUi.OFdWdER6OlshEKmUwrs.RjgiKYZcX9VShF.72RWq X-Rslight-Posting-User: cb29269328a20fe5719ed6a1c397e21f651bda71 X-Spam-Checker-Version: SpamAssassin 4.0.0 Bytes: 2504 Lines: 36 On Mon, 21 Oct 2024 22:02:27 +0000, BGB wrote: > On 10/17/2024 4:34 PM, EricP wrote: > > Pros: > Technically makes sense for PCs as they are. > Cons: > Looses some of the major aspects of what makes x86 unique; > Doesn't really solve issues for x86-64's longer term survival. > x86's long term survival depends on things out of AMD's and Intel's hands. It depends on high volume access to devices people will buy new every year or every other year. A PC is not such a thing, while a cell phone seems to be. > > Absent changing to a more sensible encoding scheme and limiting or > removing condition-codes, x86-64 still has this major boat anchor. But, > these can't be changed without breaking backwards compatibility (at > least, assuming hardware that continues running x86-64 as the native > hardware ISA). Condition codes were never "that hard" of a problem wither in pipelining nor in operand routing. > > Though, ironically, most "legacy x86" stuff could probably be served > acceptably with emulators. > Every try to emulate A24 ? Address bit 24--when we looked at it, it took more gates to remove it and put a bit in CPUID so applications could "do the right thing" than to simply leave the functionality there. > > If it can't maintain a performance advantage (say, if ARM and RISC-V > catch up or exceed the performance possible on higher end x86 chips), it > is effectively done. > x86 performance advantage has ALWAYS been in the cubic amounts of cash flow running through the FAB to pay the engineering team budgets.