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Path: ...!weretis.net!feeder9.news.weretis.net!i2pn.org!i2pn2.org!.POSTED!not-for-mail From: mitchalsup@aol.com (MitchAlsup1) Newsgroups: comp.arch Subject: Re: Byte Addressability And Beyond Date: Mon, 6 May 2024 19:26:16 +0000 Organization: Rocksolid Light Message-ID: <3df535d1c29a9c2de67c7edc74ed5ea8@www.novabbs.org> References: <v0s17o$2okf4$2@dont-email.me> <2024May3.171330@mips.complang.tuwien.ac.at> <v13olm$p9ih$9@dont-email.me> <2024May4.111127@mips.complang.tuwien.ac.at> <AnsZN.60734$gF_b.49289@fx17.iad> <v17dav$1o21q$2@dont-email.me> <20240505121327.00000946@yahoo.com> <v19fba$2asct$2@dont-email.me> <v19v9a$2e4te$1@dont-email.me> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Injection-Info: i2pn2.org; logging-data="290648"; mail-complaints-to="usenet@i2pn2.org"; posting-account="65wTazMNTleAJDh/pRqmKE7ADni/0wesT78+pyiDW8A"; User-Agent: Rocksolid Light X-Spam-Checker-Version: SpamAssassin 4.0.0 X-Rslight-Posting-User: ac58ceb75ea22753186dae54d967fed894c3dce8 X-Rslight-Site: $2y$10$lWheH1cfart2dHkeqf/Iy.rmDBlEUD6Fm.G3iGIcSmRpfpMJ7Wh.. Bytes: 2726 Lines: 42 BGB wrote: > On 5/5/2024 9:30 PM, Lawrence D'Oliveiro wrote: >> On Sun, 5 May 2024 12:13:27 +0300, Michael S wrote: >> >>> PEXTR/PDEP has no immediate form, which makes it inconvenient for >>> 'C'-style fixed bit fields. >> >> Fixed bit fields are a limitation of the C language. Why should it >> constrain the design of machine architectures? > If it lacks an immediate form, one is harder pressed to beat out > shift+and or shift+shift on the performance front... > Though, to be useful, it needs an immediate large enough to express both > the shift amount and the width of the bitfield, and also a 3RI encoding. My 66000 has 12-bits of immediate for shifts, and a slot in the 3-operand instruction group. > Bitfield insert would a little easier to get a performance advantage (vs > bitfield extract), since insertion is a more complex operation, but is > also likely require a more complex implementation and is also less > common than bitfield extract. Without SR <w:o>; one needs two shifts and a container sized mask SR Rt,Rc,#64-11 // get rid of excess significance SL Rt,Rt,#64-11-12 // position field to container AND Rk,Rk,#ox0007FF0000 // EMPTY field in Kontainer OR Rk,Rk,Rt // insert field With: SR Rt,Rc,<11:12> AND Rk,Rk,#ox0007FF0000 // EMPTY field in Kontainer OR Rk,Rk,Rt // insert field With insert:: INS Rk,Rk,Rc,<11:12> > ....