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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Stealing a Great Idea from the 6600
Date: Wed, 31 Jul 2024 14:48:58 +0000
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On Wed, 31 Jul 2024 7:40:55 +0000, Michael S wrote:

> On Tue, 30 Jul 2024 23:51:39 -0000 (UTC)
> Lawrence D'Oliveiro <ldo@nz.invalid> wrote:
>
>> On Tue, 30 Jul 2024 12:04:59 +0300, Michael S wrote:
>>
>>> On Tue, 30 Jul 2024 02:10:05 -0000 (UTC) Lawrence D'Oliveiro
>>> <ldo@nz.invalid> wrote:
>>>
>>>> That would be equivalent to a 100-wide in-order processor, would it
>>>> not?
>>>
>>> It would not.
>>
>> Why not?
>
> How many instructions in flight are there on 1-wide in-order MIPS
> R3000?

4 int or Mem up to 6 FP

>        How many on 1-wide in-order MIPS R4000?

6 Int or Mem up to 9 FP