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From: John Savard <quadibloc@servername.invalid>
Newsgroups: comp.arch
Subject: Re: Concertlina II: Full Circle
Date: Tue, 18 Jun 2024 21:36:06 -0600
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On Tue, 18 Jun 2024 23:57:54 +0000, mitchalsup@aol.com (MitchAlsup1)
wrote:
>John Savard wrote:

>> And so you indicate this explicitly in VVM as well. I tended to assume
>> only a limited number of registers would be needed to live in, plus I
>> have both floating and integer register files, hence the differences.
>
>It ends up that the majority of register uses in a loop do not need to
>be visible outside of the loop. This is almost the contrapositive of
>annotating which registers are temporary in the loop. 90%+ of loops do 
>not even need the index register to be live outside of the loop.
>
You have convinced me here to learn from your wisdom: I will do two
things. One is to add a bit that decides whether my 1 bits (confined
to a single group of 8 registers) are live-in or live-out bits. The
other is to specify clearly to implementors that if a register is
specified as "live-in" but is never actually used in a loop, this must
not cause any problems.

John Savard