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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Decrement And Branch
Date: Thu, 15 Aug 2024 00:15:40 +0000
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On Wed, 14 Aug 2024 8:53:22 +0000, Lawrence D'Oliveiro wrote:

> On Wed, 14 Aug 2024 01:33:32 +0000, MitchAlsup1 wrote:
>
>> On Tue, 13 Aug 2024 22:00:12 +0000, Lawrence D'Oliveiro wrote:
>>
>>> On Tue, 13 Aug 2024 09:00:25 -0000 (UTC), I wrote:
>>>
>>>> However, the good old VAX (in its usual kitchen-sink fashion) had a
>>>> whole set of variations, including one that decremented down to -1
>>>> instead of zero. And the Motorola 68000 family only had the decrement
>>>> down to -1 version.
>>>
>>> VAX example of how to use SOBGEQ instead of SOBGTR:
>>>
>>>         movl    «loop count», Rn br      bottom_of_loop
>>> top_of_loop:
>>>         .... body of loop ...
>>> bottom_of_loop:
>>>         sobgeq  Rn, top_of_loop
>>>
>>> Like I said, I wondered why this sort of thing wasn’t more common ...
>>
>> Perhaps the RISC mantra has permeated the minds of ISA designers.
>
> Would you prefer it with a decrement+separate conditional-jump
> instruction pair?

I have real LOOP instructions:: ADD-CMP-BC and access to constants
so one can::
ADD #{1,2,3...31}, ADD #-{1,2,3,...31}, ADD register,
CMP #{1,2,3...31}, CMP #-{1,2,3...31}, CMP register,
BC {EQ, NE, LE, LT, GE, GT, LO, LS, HI, HS}
Any way you want.