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From: mitchalsup@aol.com (MitchAlsup1)
Newsgroups: comp.arch
Subject: Re: Tonights Tradeoff
Date: Wed, 11 Sep 2024 21:30:31 +0000
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On Tue, 10 Sep 2024 14:58:30 +0000, Robert Finch wrote:

> On 2024-09-10 3:00 a.m., BGB wrote:
>>
>> I am not as much a fan of RISC-V's 'V' extension mostly in that it would
>> require essentially doubling the size of the register file.
>
> The register file in Q+ is huge. One of the drawbacks of supporting
> vectors. There were 1024 physical registers for support. Reduced it to
> 512 and that still may be too many. There was a 4kb wide mapping ram,
> resulting in a warning message. I may have to split up components into
> multiple copies to get the desired size to work.

VVM supports vectors as big as the implementation can handle with a
total
cost of 6-bits of state.